Wave Computing has made good on its promise of making the MIPs instruction set architecture (MIPS) available free of charge, announcing the first release in what it is calling the MIPS Open initiative. Traditionally, processor instruction set architectures (ISAs) are proprietary affairs: If anyone wants to build an x86 processor, for example, they need to
Wave Computing has made good on its promise of making the MIPs instruction set architecture (MIPS) available free of charge, announcing the first release in what it is calling the MIPS Open initiative.
Traditionally, processor instruction set architectures (ISAs) are proprietary affairs: If anyone wants to build an x86 processor, for example, they need to stump up for a licence – which are thin on the ground. Even more accessible ISAs like Arm require anyone interested in using it to pay millions in licensing fees followed by millions more in royalties. Aiming to address this is the free and open source silicon (FOSSi) movement, the most popular of which is the RISC-V ISA: Available, unlike its proprietary competition, freely for anyone to use or modify as they see fit with no licensing or royalty fees attached.
The increasing popularity of RISC-V, coupled with a major hole in its balance sheet, was a likely catalyst for Imagination Technologies’ decision to sell MIPS to investment group Tallwood in 2017, which sold it on to Wave Computing a year later. In December last year Wave Computing unveiled its plan for the ISA: to make it freely available with no licence or royalty fees as a direct competitor to RISC-V.
Now, the company has made good on its promise with the first release of MIPS Open: full access to the latest MIPS R6 release in 32- and 64-bit flavours, entirely without fees and with full coverage under Wave’s patent portfolio.
‘The Wave Computing team is thrilled to complete the first MIPS Open release, as promised and on schedule, which we see as a key enabler for Wave’s “AI for All” vision,‘ says Art Swift, president of Wave Computing’s MIPS IP division, of the release. ‘Leveraging decades of R&D and ecosystem investments, today’s launch now enables chip designers to begin development on the latest version of the silicon-proven MIPS architecture without licence fees or royalties. Additional releases are planned, and we fully expect MIPS Open to become the new standard for open use instruction set architectures. Wave is deeply committed to open and shared development initiatives, like MIPS Open and the Berkeley Artificial Intelligence Research (BAIR) project, which we believe accelerate innovation and propel the entire industry into new frontiers.‘
The release includes the ISA itself, extensions for virtualisation, simultaneous multithreading, single instruction multiple data (SIMD) operation, digital signal processing (DSP), and a code compression system called microMIPS, a toolchain dubbed the MIPS Open Tools, a training programme with MIPS cores implemented as Verilog files for use with field-programmable gate arrays (FPGAs), 25 hands-on labs sessions, tutorials on building a MIPS system-on-chip (SoC), and register transfer level (RTL) code for the MIPS microAptiv core – though this is provided as a sample for non-commercial use only.
More information is available on the official website.